Image sensor arrays typically comprise a linear array of photosensors which raster scan an image-bearing document and convert the microscopic image areas viewed by each photosensor to video image signals. Following an integration period, the image signal charges formed on the photosensors are amplified and transferred as analog video signals to a common output line or bus through successively actuated multiplexing transistors.
For high-performance image sensor arrays, one embodiment includes an array of photosensors of a width comparable to the width of a page being scanned, to permit imaging generally without the use of reductive optics. In order to provide such a “full-width” array, however, relatively large silicon structures must be used to define the large number of photosensors. In one design, an array is made of twenty silicon chips, butted end-to-end, each chip having 248 active photosensors spaced at 400 photosensors per inch. Typically, the chips which are butted to form the array are formed in a silicon wafer, which is then “diced” into a number of chips, which are individually tested and then arranged into a bar shape.
The present disclosure relates to a chip configuration that can be readily adapted for use in a larger system or apparatus, taking into account a given format of control data by which the larger system controls the chips.